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gd32f3x0_cec.h

gd32f3x0_cec.h 15 KB
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  1. /*!
    2. 

  2.     \file  gd32f3x0_cec.h
    3. 

  3.     \brief definitions for the CEC
    4. 

  4. */
    5. 

  5. 

  6. /*
    7. 

  7.     Copyright (C) 2017 GigaDevice
    8. 

  8. 

  9.     2017-06-06, V1.0.0, firmware for GD32F3x0
    10. 

  10. */
    11. 

  11. 

  12. #ifdef GD32F350
    13. 

  13. 

  14. #ifndef GD32F3X0_CEC_H
    15. 

  15. #define GD32F3X0_CEC_H
    16. 

  16. 

  17. #include "gd32f3x0.h"
    18. 

  18. 

  19. /* CEC definitions */
    20. 

  20. #define CEC                                CEC_BASE                   /*!< CEC base address */
    21. 

  21. 

  22. /* registers definitions */
    23. 

  23. #define CEC_CTL                            REG32(CEC + 0x00U)         /*!< CEC control register */
    24. 

  24. #define CEC_CFG                            REG32(CEC + 0x04U)         /*!< CEC configuration register */
    25. 

  25. #define CEC_TDATA                          REG32(CEC + 0x08U)         /*!< CEC transmit data register */
    26. 

  26. #define CEC_RDATA                          REG32(CEC + 0x0CU)         /*!< CEC receive data register */
    27. 

  27. #define CEC_INTF                           REG32(CEC + 0x10U)         /*!< CEC interrupt flag Register */
    28. 

  28. #define CEC_INTEN                          REG32(CEC + 0x14U)         /*!< CEC interrupt enable register */
    29. 

  29. 

  30. /* bits definitions */
    31. 

  31. /* CEC_CTL */
    32. 

  32. #define CEC_CTL_CECEN                      BIT(0)                     /*!< enable or disable HDMI-CEC controller bit */
    33. 

  33. #define CEC_CTL_STAOM                      BIT(1)                     /*!< start of sending a message. */
    34. 

  34. #define CEC_CTL_ENDOM                      BIT(2)                     /*!< ENDOM bit value in the next frame in Tx mode */
    35. 

  35. 

  36. /* CEC_CFG */
    37. 

  37. #define CEC_CFG_SFT                        BITS(0,2)                  /*!< signal free time */
    38. 

  38. #define CEC_CFG_RTOL                       BIT(3)                     /*!< reception bit timing tolerance */
    39. 

  39. #define CEC_CFG_BRES                       BIT(4)                     /*!< whether stop receive message when detected BRE */
    40. 

  40. #define CEC_CFG_BREG                       BIT(5)                     /*!< generate Error-bit when detected BRE in singlecast */
    41. 

  41. #define CEC_CFG_BPLEG                      BIT(6)                     /*!< generate Error-bit when detected BPLE in singlecast */
    42. 

  42. #define CEC_CFG_BCNG                       BIT(7)                     /*!< do not generate Error-bit in broadcast message */
    43. 

  43. #define CEC_CFG_SFTOPT                     BIT(8)                     /*!< the SFT start option bit */
    44. 

  44. #define CEC_CFG_OWN_ADDRESS                BITS(16,30)                /*!< own address */
    45. 

  45. #define CEC_CFG_LMEN                       BIT(31)                    /*!< listen mode enable bit */
    46. 

  46. 

  47. /* CEC_TDATA */
    48. 

  48. #define CEC_TDATA_TDATA                    BITS(0,7)                  /*!< Tx data register */
    49. 

  49. 

  50. /* CEC_RDATA */
    51. 

  51. #define CEC_RDATA_RDATA                    BITS(0,7)                  /*!< Rx data register */
    52. 

  52. 

  53. /* CEC_INTF */
    54. 

  54. #define CEC_INTF_BR                        BIT(0)                     /*!< Rx-byte data received */
    55. 

  55. #define CEC_INTF_REND                      BIT(1)                     /*!< end of reception */
    56. 

  56. #define CEC_INTF_RO                        BIT(2)                     /*!< Rx overrun */
    57. 

  57. #define CEC_INTF_BRE                       BIT(3)                     /*!< bit rising error */
    58. 

  58. #define CEC_INTF_BPSE                      BIT(4)                     /*!< short bit period error */
    59. 

  59. #define CEC_INTF_BPLE                      BIT(5)                     /*!< long bit period error */
    60. 

  60. #define CEC_INTF_RAE                       BIT(6)                     /*!< Rx ACK error */
    61. 

  61. #define CEC_INTF_ARBF                      BIT(7)                     /*!< arbitration fail */
    62. 

  62. #define CEC_INTF_TBR                       BIT(8)                     /*!< Tx-byte data request */
    63. 

  63. #define CEC_INTF_TEND                      BIT(9)                     /*!< transmission successfully end */
    64. 

  64. #define CEC_INTF_TU                        BIT(10)                    /*!< Tx data buffer underrun */
    65. 

  65. #define CEC_INTF_TERR                      BIT(11)                    /*!< Tx-error */
    66. 

  66. #define CEC_INTF_TAERR                     BIT(12)                    /*!< Tx ACK error flag */
    67. 

  67. 

  68. /* CEC_INTEN */
    69. 

  69. #define CEC_INTEN_BRIE                     BIT(0)                     /*!< BR interrupt enable */
    70. 

  70. #define CEC_INTEN_RENDIE                   BIT(1)                     /*!< REND interrupt enable */
    71. 

  71. #define CEC_INTEN_ROIE                     BIT(2)                     /*!< RO interrupt enable */
    72. 

  72. #define CEC_INTEN_BREIE                    BIT(3)                     /*!< BRE interrupt enable. */
    73. 

  73. #define CEC_INTEN_BPSEIE                   BIT(4)                     /*!< BPSE interrupt enable */
    74. 

  74. #define CEC_INTEN_BPLEIE                   BIT(5)                     /*!< BPLE interrupt enable. */
    75. 

  75. #define CEC_INTEN_RAEIE                    BIT(6)                     /*!< RAE interrupt enable */
    76. 

  76. #define CEC_INTEN_ARBFIE                   BIT(7)                     /*!< ARBF interrupt enable */
    77. 

  77. #define CEC_INTEN_TBRIE                    BIT(8)                     /*!< TBR interrupt enable */
    78. 

  78. #define CEC_INTEN_TENDIE                   BIT(9)                     /*!< TEND interrupt enable */
    79. 

  79. #define CEC_INTEN_TUIE                     BIT(10)                    /*!< TU interrupt enable */
    80. 

  80. #define CEC_INTEN_TERRIE                   BIT(11)                    /*!< TE interrupt enable */
    81. 

  81. #define CEC_INTEN_TAERRIE                  BIT(12)                    /*!< TAE interrupt enable */
    82. 

  82. 

  83. /* constants definitions */
    84. 

  84. /* signal free time */
    85. 

  85. #define CFG_SFT(regval)                    (BITS(0, 2) & ((regval) << 0U))
    86. 

  86. #define CEC_SFT_PROTOCOL_PERIOD            CFG_SFT(0)                 /*!< the signal free time will perform as HDMI-CEC protocol description */
    87. 

  87. #define CEC_SFT_1POINT5_PERIOD             CFG_SFT(1)                 /*!< 1.5 nominal data bit periods */
    88. 

  88. #define CEC_SFT_2POINT5_PERIOD             CFG_SFT(2)                 /*!< 2.5 nominal data bit periods */
    89. 

  89. #define CEC_SFT_3POINT5_PERIOD             CFG_SFT(3)                 /*!< 3.5 nominal data bit periods */
    90. 

  90. #define CEC_SFT_4POINT5_PERIOD             CFG_SFT(4)                 /*!< 4.5 nominal data bit periods */
    91. 

  91. #define CEC_SFT_5POINT5_PERIOD             CFG_SFT(5)                 /*!< 5.5 nominal data bit periods */
    92. 

  92. #define CEC_SFT_6POINT5_PERIOD             CFG_SFT(6)                 /*!< 6.5 nominal data bit periods */
    93. 

  93. #define CEC_SFT_7POINT5_PERIOD             CFG_SFT(7)                 /*!< 7.5 nominal data bit periods */
    94. 

  94. 

  95. /* signal free time start option */
    96. 

  96. #define CEC_SFT_START_STAOM                ((uint32_t)0x00000000U)    /*!< signal free time counter starts counting when STAOM is asserted */
    97. 

  97. #define CEC_SFT_START_LAST                 CEC_CFG_SFTOPT             /*!< signal free time counter starts automatically after transmission/reception end */
    98. 

  98. 

  99. /* own address */
    100. 

  100. #define CEC_OWN_ADDRESS_CLEAR              ((uint32_t)0x00000000U)    /*!< own address is cleared */
    101. 

  101. #define CEC_OWN_ADDRESS0                   BIT(16)                    /*!< own address is 0 */
    102. 

  102. #define CEC_OWN_ADDRESS1                   BIT(17)                    /*!< own address is 1 */
    103. 

  103. #define CEC_OWN_ADDRESS2                   BIT(18)                    /*!< own address is 2 */
    104. 

  104. #define CEC_OWN_ADDRESS3                   BIT(19)                    /*!< own address is 3 */
    105. 

  105. #define CEC_OWN_ADDRESS4                   BIT(20)                    /*!< own address is 4 */
    106. 

  106. #define CEC_OWN_ADDRESS5                   BIT(21)                    /*!< own address is 5 */
    107. 

  107. #define CEC_OWN_ADDRESS6                   BIT(22)                    /*!< own address is 6 */
    108. 

  108. #define CEC_OWN_ADDRESS7                   BIT(23)                    /*!< own address is 7 */
    109. 

  109. #define CEC_OWN_ADDRESS8                   BIT(24)                    /*!< own address is 8 */
    110. 

  110. #define CEC_OWN_ADDRESS9                   BIT(25)                    /*!< own address is 9 */
    111. 

  111. #define CEC_OWN_ADDRESS10                  BIT(26)                    /*!< own address is 10 */
    112. 

  112. #define CEC_OWN_ADDRESS11                  BIT(27)                    /*!< own address is 11 */
    113. 

  113. #define CEC_OWN_ADDRESS12                  BIT(28)                    /*!< own address is 12 */
    114. 

  114. #define CEC_OWN_ADDRESS13                  BIT(29)                    /*!< own address is 13 */
    115. 

  115. #define CEC_OWN_ADDRESS14                  BIT(30)                    /*!< own address is 14 */
    116. 

  116. 

  117. /* error-bit generate */
    118. 

  118. #define CEC_BROADCAST_ERROR_BIT_ON         ((uint32_t)0x00000000U)    /*!< generate Error-bit in broadcast */
    119. 

  119. #define CEC_BROADCAST_ERROR_BIT_OFF        CEC_CFG_BCNG               /*!< do not generate Error-bit in broadcast */
    120. 

  120. #define CEC_LONG_PERIOD_ERROR_BIT_OFF      ((uint32_t)0x00000000U)    /*!< generate Error-bit on long bit period error */
    121. 

  121. #define CEC_LONG_PERIOD_ERROR_BIT_ON       CEC_CFG_BPLEG              /*!< do not generate Error-bit on long bit period error */
    122. 

  122. #define CEC_RISING_PERIOD_ERROR_BIT_OFF    ((uint32_t)0x00000000U)    /*!< generate Error-bit on bit rising error */ 
    123. 

  123. #define CEC_RISING_PERIOD_ERROR_BIT_ON     CEC_CFG_BREG               /*!< do not generate Error-bit on bit rising error */ 
    124. 

  124. 

  125. /* whether stop receive message when detected bit rising error */
    126. 

  126. #define CEC_STOP_RISING_ERROR_BIT_ON       ((uint32_t)0x00000000U)    /*!< stop reception when detected bit rising error */
    127. 

  127. #define CEC_STOP_RISING_ERROR_BIT_OFF      ((uint32_t)0x00000001U)    /*!< do not stop reception when detected bit rising error */
    128. 

  128. 

  129. /* flag bits */
    130. 

  130. #define CEC_FLAG_BR                        CEC_INTF_BR                /*!< RX-byte data received */
    131. 

  131. #define CEC_FLAG_REND                      CEC_INTF_REND              /*!< end of reception */
    132. 

  132. #define CEC_FLAG_RO                        CEC_INTF_RO                /*!< RX overrun */
    133. 

  133. #define CEC_FLAG_BRE                       CEC_INTF_BRE               /*!< bit rising error */
    134. 

  134. #define CEC_FLAG_BPSE                      CEC_INTF_BPSE              /*!< short bit period error */
    135. 

  135. #define CEC_FLAG_BPLE                      CEC_INTF_BPLE              /*!< long bit period error */
    136. 

  136. #define CEC_FLAG_RAE                       CEC_INTF_RAE               /*!< RX ACK error */
    137. 

  137. #define CEC_FLAG_ARBF                      CEC_INTF_ARBF              /*!< arbitration lost */
    138. 

  138. #define CEC_FLAG_TBR                       CEC_INTF_TBR               /*!< TX-byte data request */
    139. 

  139. #define CEC_FLAG_TEND                      CEC_INTF_TEND              /*!< transmission successfully end */
    140. 

  140. #define CEC_FLAG_TU                        CEC_INTF_TU                /*!< TX data buffer underrun */
    141. 

  141. #define CEC_FLAG_TERR                      CEC_INTF_TERR              /*!< TX-error */
    142. 

  142. #define CEC_FLAG_TAERR                     CEC_INTF_TAERR             /*!< TX ACK error flag */
    143. 

  143. 

  144. /* interrupt flag bits */
    145. 

  145. #define CEC_INT_FLAG_BR                    CEC_INTF_BR                /*!< RX-byte data received */
    146. 

  146. #define CEC_INT_FLAG_REND                  CEC_INTF_REND              /*!< end of reception */
    147. 

  147. #define CEC_INT_FLAG_RO                    CEC_INTF_RO                /*!< RX overrun */
    148. 

  148. #define CEC_INT_FLAG_BRE                   CEC_INTF_BRE               /*!< bit rising error */
    149. 

  149. #define CEC_INT_FLAG_BPSE                  CEC_INTF_BPSE              /*!< short bit period error */
    150. 

  150. #define CEC_INT_FLAG_BPLE                  CEC_INTF_BPLE              /*!< long bit period error */
    151. 

  151. #define CEC_INT_FLAG_RAE                   CEC_INTF_RAE               /*!< RX ACK error */
    152. 

  152. #define CEC_INT_FLAG_ARBF                  CEC_INTF_ARBF              /*!< arbitration lost */
    153. 

  153. #define CEC_INT_FLAG_TBR                   CEC_INTF_TBR               /*!< TX-byte data request */
    154. 

  154. #define CEC_INT_FLAG_TEND                  CEC_INTF_TEND              /*!< transmission successfully end */
    155. 

  155. #define CEC_INT_FLAG_TU                    CEC_INTF_TU                /*!< TX data buffer underrun */
    156. 

  156. #define CEC_INT_FLAG_TERR                  CEC_INTF_TERR              /*!< TX-error */
    157. 

  157. #define CEC_INT_FLAG_TAERR                 CEC_INTF_TAERR             /*!< TX ACK error flag */
    158. 

  158. 

  159. /* interrupt enable bits */
    160. 

  160. #define CEC_INT_BR                         CEC_INTEN_BRIE             /*!< RBR interrupt enable */
    161. 

  161. #define CEC_INT_REND                       CEC_INTEN_RENDIE           /*!< REND interrupt enable */
    162. 

  162. #define CEC_INT_RO                         CEC_INTEN_ROIE             /*!< RO interrupt enable */
    163. 

  163. #define CEC_INT_BRE                        CEC_INTEN_BREIE            /*!< RBRE interrupt enable. */
    164. 

  164. #define CEC_INT_BPSE                       CEC_INTEN_BPSEIE           /*!< RSBPE interrupt enable */
    165. 

  165. #define CEC_INT_BPLE                       CEC_INTEN_BPLEIE           /*!< RLBPE interrupt enable. */
    166. 

  166. #define CEC_INT_RAE                        CEC_INTEN_RAEIE            /*!< RAE interrupt enable */
    167. 

  167. #define CEC_INT_ARBF                       CEC_INTEN_ARBFIE           /*!< ALRLST interrupt enable */
    168. 

  168. #define CEC_INT_TBR                        CEC_INTEN_TBRIE            /*!< TBR interrupt enable */
    169. 

  169. #define CEC_INT_TEND                       CEC_INTEN_TENDIE           /*!< TEND interrupt enable */
    170. 

  170. #define CEC_INT_TU                         CEC_INTEN_TUIE             /*!< TU interrupt enable */
    171. 

  171. #define CEC_INT_TERR                       CEC_INTEN_TERRIE           /*!< TE interrupt enable */
    172. 

  172. #define CEC_INT_TAERR                      CEC_INTEN_TAERRIE          /*!< TAE interrupt enable */
    173. 

  173. 

  174. /* function declarations */
    175. 

  175. /* reset HDMI-CEC controller */
    176. 

  176. void cec_deinit(void);
    177. 

  177. /* configure signal free time,the signal free time counter start option,own address */
    178. 

  178. void cec_init(uint32_t sftmopt, uint32_t sft, uint32_t address);
    179. 

  179. /* configure generate Error-bit, whether stop receive message when detected bit rising error */
    180. 

  180. void cec_error_config(uint32_t broadcast, uint32_t singlecast_lbpe, uint32_t singlecast_bre, uint32_t rxbrestp);
    181. 

  181. /* enable HDMI-CEC controller */
    182. 

  182. void cec_enable(void);
    183. 

  183. /* disable HDMI-CEC controller */
    184. 

  184. void cec_disable(void);
    185. 

  185. 

  186. /* start CEC message transmission */
    187. 

  187. void cec_transmission_start(void);
    188. 

  188. /* end CEC message transmission */
    189. 

  189. void cec_transmission_end(void);
    190. 

  190. /* enable CEC listen mode */
    191. 

  191. void cec_listen_mode_enable(void);
    192. 

  192. /* disable CEC listen mode */
    193. 

  193. void cec_listen_mode_disable(void);
    194. 

  194. /* configure and clear own address */
    195. 

  195. void cec_own_address_config(uint32_t address);
    196. 

  196. /* configure signal free time and the signal free time counter start option */
    197. 

  197. void cec_sft_config(uint32_t sftmopt,uint32_t sft);
    198. 

  198. /* configure generate Error-bit when detected some abnormal situation or not */
    199. 

  199. void cec_generate_errorbit_config(uint32_t broadcast, uint32_t singlecast_lbpe, uint32_t singlecast_bre);
    200. 

  200. /* whether stop receive message when detected bit rising error */
    201. 

  201. void cec_stop_receive_bre_config(uint32_t rxbrestp);
    202. 

  202. /* enable reception bit timing tolerance */
    203. 

  203. void cec_reception_tolerance_enable(void);
    204. 

  204. /* disable reception bit timing tolerance */
    205. 

  205. void cec_reception_tolerance_disable(void);
    206. 

  206. /* send a data by the CEC peripheral */
    207. 

  207. void cec_data_send(uint8_t data);
    208. 

  208. /* receive a data by the CEC peripheral */
    209. 

  209. uint8_t cec_data_receive(void);
    210. 

  210. 

  211. /* clear CEC int flag and status */
    212. 

  212. FlagStatus cec_interrupt_flag_get(uint32_t flag);
    213. 

  213. /* clear CEC flag */
    214. 

  214. void cec_interrupt_flag_clear(uint32_t flag);
    215. 

  215. /* enable interrupt */
    216. 

  216. void cec_interrupt_enable(uint32_t flag);
    217. 

  217. /* disable interrupt */
    218. 

  218. void cec_interrupt_disable(uint32_t flag);
    219. 

  219. /* get CEC status */
    220. 

  220. FlagStatus cec_flag_get(uint32_t flag);
    221. 

  221. /* clear CEC status */
    222. 

  222. void cec_flag_clear(uint32_t flag);
    223. 

  223. 

  224. #endif /* GD32F3X0_CEC_H */
    225. 

  225. 

  226. #endif /* GD32F350 */
    227.