main.c 5.5 KB

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  1. /*!
  2. \file main.c
  3. \brief transfer data from RAM to RAM
  4. */
  5. /*
  6. Copyright (C) 2017 GigaDevice
  7. 2017-06-06, V1.0.0, firmware for GD32F3x0
  8. */
  9. #include "gd32f3x0.h"
  10. #include "gd32f3x0_eval.h"
  11. #include <string.h>
  12. #define DATANUM 16
  13. __IO uint8_t g_dmacomplete_flag = 0;
  14. ErrStatus transferflag1 = ERROR;
  15. ErrStatus transferflag2 = ERROR;
  16. ErrStatus transferflag3 = ERROR;
  17. ErrStatus transferflag4 = ERROR;
  18. uint8_t source_address[DATANUM]= {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,
  19. 0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,0x10};
  20. uint8_t destination_address1[DATANUM];
  21. uint8_t destination_address2[DATANUM];
  22. uint8_t destination_address3[DATANUM];
  23. uint8_t destination_address4[DATANUM];
  24. void destbuf_init(void);
  25. void led_config(void);
  26. void nvic_config(void);
  27. ErrStatus uc_data_compare(uint8_t* src, uint8_t* dst, uint16_t length);
  28. /*!
  29. \brief main function
  30. \param[in] none
  31. \param[out] none
  32. \retval none
  33. */
  34. int main(void)
  35. {
  36. dma_parameter_struct dma_init_struct;
  37. /* enable DMA clock */
  38. rcu_periph_clock_enable(RCU_DMA);
  39. /* initialize LED */
  40. led_config();
  41. /* initialize NVIC */
  42. nvic_config();
  43. /* all LED off */
  44. gd_eval_led_off(LED1);
  45. gd_eval_led_off(LED3);
  46. gd_eval_led_off(LED2);
  47. gd_eval_led_off(LED4);
  48. destbuf_init();
  49. /* initialize DMA channel1 */
  50. dma_deinit(DMA_CH1);
  51. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  52. dma_init_struct.memory_addr = (uint32_t)destination_address1;
  53. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  54. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
  55. dma_init_struct.number = DATANUM;
  56. dma_init_struct.periph_addr = (uint32_t)source_address;
  57. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_ENABLE;
  58. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
  59. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  60. dma_init(DMA_CH1, dma_init_struct);
  61. /* configure DMA mode */
  62. dma_circulation_disable(DMA_CH1);
  63. dma_memory_to_memory_enable(DMA_CH1);
  64. /* initialize DMA channel2 */
  65. dma_deinit(DMA_CH2);
  66. dma_init_struct.memory_addr = (uint32_t)destination_address2;
  67. dma_init(DMA_CH2, dma_init_struct);
  68. /* configure DMA mode */
  69. dma_circulation_disable(DMA_CH2);
  70. dma_memory_to_memory_enable(DMA_CH2);
  71. /* initialize DMA channel3 */
  72. dma_deinit(DMA_CH3);
  73. dma_init_struct.memory_addr = (uint32_t)destination_address3;
  74. dma_init(DMA_CH3, dma_init_struct);
  75. /* configure DMA mode */
  76. dma_circulation_disable(DMA_CH3);
  77. dma_memory_to_memory_enable(DMA_CH3);
  78. /* initialize DMA channel4 */
  79. dma_deinit(DMA_CH4);
  80. dma_init_struct.memory_addr = (uint32_t)destination_address4;
  81. dma_init(DMA_CH4, dma_init_struct);
  82. /* configure DMA mode */
  83. dma_circulation_disable(DMA_CH4);
  84. dma_memory_to_memory_enable(DMA_CH4);
  85. /* DMA channel1~channel4 interrupt enable */
  86. dma_interrupt_enable(DMA_CH1, DMA_INT_FTF);
  87. dma_interrupt_enable(DMA_CH2, DMA_INT_FTF);
  88. dma_interrupt_enable(DMA_CH3, DMA_INT_FTF);
  89. dma_interrupt_enable(DMA_CH4, DMA_INT_FTF);
  90. /* enable DMA channel1~channel4 */
  91. dma_channel_enable(DMA_CH1);
  92. dma_channel_enable(DMA_CH2);
  93. dma_channel_enable(DMA_CH3);
  94. dma_channel_enable(DMA_CH4);
  95. /* wait for DMA transfer complete */
  96. while(0x0f != g_dmacomplete_flag);
  97. /* compare the data of source_address with data of destination_address */
  98. transferflag1 = uc_data_compare(source_address, destination_address1, DATANUM);
  99. transferflag2 = uc_data_compare(source_address, destination_address2, DATANUM);
  100. transferflag3 = uc_data_compare(source_address, destination_address3, DATANUM);
  101. transferflag4 = uc_data_compare(source_address, destination_address4, DATANUM);
  102. /* if DMA channel1 transfer success,light LED1 */
  103. if(SUCCESS == transferflag1){
  104. gd_eval_led_on(LED1);
  105. }
  106. /* if DMA channel2 transfer success,light LED2 */
  107. if(SUCCESS == transferflag2){
  108. gd_eval_led_on(LED2);
  109. }
  110. /* if DMA channel3 transfer success,light LED3 */
  111. if(SUCCESS == transferflag3){
  112. gd_eval_led_on(LED3);
  113. }
  114. /* if DMA channel4 transfer success,light LED4 */
  115. if(SUCCESS == transferflag4){
  116. gd_eval_led_on(LED4);
  117. }
  118. while (1);
  119. }
  120. /*!
  121. \brief initialize destination buffer
  122. \param[in] none
  123. \param[out] none
  124. \retval none
  125. */
  126. void destbuf_init(void)
  127. {
  128. memset(destination_address1, 0, DATANUM);
  129. memset(destination_address2, 0, DATANUM);
  130. memset(destination_address3, 0, DATANUM);
  131. memset(destination_address4, 0, DATANUM);
  132. }
  133. /*!
  134. \brief LEDs configure
  135. \param[in] none
  136. \param[out] none
  137. \retval none
  138. */
  139. void led_config(void)
  140. {
  141. gd_eval_led_init (LED1);
  142. gd_eval_led_init (LED2);
  143. gd_eval_led_init (LED3);
  144. gd_eval_led_init (LED4);
  145. }
  146. /*!
  147. \brief data compare function
  148. \param[in] src : source data
  149. \param[in] dst : destination data
  150. \param[in] length : the compare data length
  151. \param[out] none
  152. \retval ErrStatus : ERROR or SUCCESS
  153. */
  154. ErrStatus uc_data_compare(uint8_t* src, uint8_t* dst, uint16_t length)
  155. {
  156. while (length--){
  157. if (*src++ != *dst++){
  158. return ERROR;
  159. }
  160. }
  161. return SUCCESS;
  162. }
  163. /*!
  164. \brief configure the nested vectored interrupt controller
  165. \param[in] none
  166. \param[out] none
  167. \retval none
  168. */
  169. void nvic_config(void)
  170. {
  171. nvic_irq_enable(DMA_Channel1_2_IRQn, 0, 0);
  172. nvic_irq_enable(DMA_Channel3_4_IRQn, 0, 0);
  173. }