main.c 4.5 KB

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  1. /*!
  2. \file main.c
  3. \brief TIMER0 dma demo
  4. */
  5. /*
  6. Copyright (C) 2017 GigaDevice
  7. 2017-06-06, V1.0.0, firmware for GD32F3x0
  8. */
  9. #include "gd32f3x0.h"
  10. #include <stdio.h>
  11. #include "gd32f3x0_eval.h"
  12. #define TIMER0_CH0CC ((uint32_t)0x040012c34)
  13. uint16_t buffer[3]={249,499,749};
  14. void gpio_config(void);
  15. void timer_config(void);
  16. void dma_config(void);
  17. /*!
  18. \brief configure the GPIO ports
  19. \param[in] none
  20. \param[out] none
  21. \retval none
  22. */
  23. void gpio_config(void)
  24. {
  25. rcu_periph_clock_enable(RCU_GPIOA);
  26. /*configure PA8(TIMER0 CH0) as alternate function*/
  27. gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_8);
  28. gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ,GPIO_PIN_8);
  29. gpio_af_set(GPIOA, GPIO_AF_2, GPIO_PIN_8);
  30. }
  31. /*!
  32. \brief configure the DMA peripheral
  33. \param[in] none
  34. \param[out] none
  35. \retval none
  36. */
  37. void dma_config(void)
  38. {
  39. dma_parameter_struct dma_init_struct;
  40. /* enable DMA clock */
  41. rcu_periph_clock_enable(RCU_DMA);
  42. /* initialize DMA channel4 */
  43. dma_deinit(DMA_CH4);
  44. /* DMA channel4 initialize */
  45. dma_deinit(DMA_CH4);
  46. dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
  47. dma_init_struct.memory_addr = (uint32_t)buffer;
  48. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  49. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_16BIT;
  50. dma_init_struct.number = 3;
  51. dma_init_struct.periph_addr = (uint32_t)TIMER0_CH0CC;
  52. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  53. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;
  54. dma_init_struct.priority = DMA_PRIORITY_HIGH;
  55. dma_init(DMA_CH4,dma_init_struct);
  56. /* configure DMA mode */
  57. dma_circulation_enable(DMA_CH4);
  58. dma_memory_to_memory_disable(DMA_CH4);
  59. /* enable DMA channel4 */
  60. dma_channel_enable(DMA_CH4);
  61. }
  62. /*!
  63. \brief configure the TIMER peripheral
  64. \param[in] none
  65. \param[out] none
  66. \retval none
  67. */
  68. void timer_config(void)
  69. {
  70. /* TIMER0 DMA Transfer example -------------------------------------------------
  71. TIMER0CLK = 84MHz(GD32F330) or 108MHz(GD32F350), Prescaler = 84(GD32F330) or 108(GD32F350)
  72. TIMER0 counter clock 1MHz.
  73. the objective is to configure TIMER0 channel 1 to generate PWM
  74. signal with a frequency equal to 1KHz and a variable duty cycle(25%,50%,75%) that is
  75. changed by the DMA after a specific number of update DMA request.
  76. the number of this repetitive requests is defined by the TIMER0 repetition counter,
  77. each 2 update requests, the TIMER0 Channel 0 duty cycle changes to the next new
  78. value defined by the buffer .
  79. -----------------------------------------------------------------------------*/
  80. timer_oc_parameter_struct timer_ocintpara;
  81. timer_parameter_struct timer_initpara;
  82. rcu_periph_clock_enable(RCU_TIMER0);
  83. timer_deinit(TIMER0);
  84. /* TIMER0 configuration */
  85. #ifdef GD32F330
  86. timer_initpara.prescaler = 83;
  87. #endif /* GD32F330 */
  88. #ifdef GD32F350
  89. timer_initpara.prescaler = 107;
  90. #endif /* GD32F350 */
  91. timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
  92. timer_initpara.counterdirection = TIMER_COUNTER_UP;
  93. timer_initpara.period = 999;
  94. timer_initpara.clockdivision = TIMER_CKDIV_DIV1;
  95. timer_initpara.repetitioncounter = 1;
  96. timer_init(TIMER0,&timer_initpara);
  97. /* CH0 configuration in PWM0 mode */
  98. timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
  99. timer_ocintpara.outputnstate = TIMER_CCXN_ENABLE;
  100. timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
  101. timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_HIGH;
  102. timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_HIGH;
  103. timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_LOW;
  104. timer_channel_output_config(TIMER0,TIMER_CH_0,&timer_ocintpara);
  105. timer_channel_output_pulse_value_config(TIMER0,TIMER_CH_0,buffer[0]);
  106. timer_channel_output_mode_config(TIMER0,TIMER_CH_0,TIMER_OC_MODE_PWM0);
  107. timer_channel_output_shadow_config(TIMER0,TIMER_CH_0,TIMER_OC_SHADOW_DISABLE);
  108. /* TIMER0 primary output enable */
  109. timer_primary_output_config(TIMER0,ENABLE);
  110. /* TIMER0 update DMA request enable */
  111. timer_dma_enable(TIMER0,TIMER_DMA_UPD);
  112. /* auto-reload preload enable */
  113. timer_auto_reload_shadow_enable(TIMER0);
  114. /* TIMER0 counter enable */
  115. timer_enable(TIMER0);
  116. }
  117. /*!
  118. \brief main function
  119. \param[in] none
  120. \param[out] none
  121. \retval none
  122. */
  123. int main(void)
  124. {
  125. gpio_config();
  126. dma_config();
  127. timer_config();
  128. while (1);
  129. }